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Seeking a remote Physical Design Engineer to handle backend implementation from netlist to GDSII using advanced EDA tools.

Senior FPGA Architect sought for 5G design in Ottawa.

Senior Digital P&R Engineer sought to optimize ASIC design for power and area using EDA tools.

Designs and implements RTL logic for FPGAs, interfaces with various teams, and provides customer support. Requires 8+ years of FPGA design experience.

Senior ASIC Verification Engineer needed in Ottawa with 7+ years of experience.SystemVerilog, UVM and hardware description languages proficiency required.Salary range: $120,000 - $170,000.

Senior FPGA Design Engineer sought for 4G/5G Radio Units. Requires 7+ years of experience in wireless systems with RTL design and verification.

Senior ASIC Design Engineer needed in Ottawa to translate requirements, implement RTL logic, and develop synthesis constraints.

Seeking a Senior C++ Systems Developer to design and implement core software components focusing on systems behavior and performance in challenging technical environments.

Seeking a Senior C++ Systems Developer to design and implement core software components focusing on systems behavior and performance in challenging technical environments.

Responsibilities include designing and executing tests, and automating them using modern tools.